Grade Calculation

First term examination: 20% 
Second term examination: 20% 
Daily effort: 25% 
Reports: 25% 
Typical report: 10%

first Experiment: SPECTRUAL ANALYSIS OF THE SIGNALS

 Objectives

To understand the concepts of time and frequency domains as applied to a waveform.

Practical of Experiment

In this practical you will investigate how the waveshape in the time domain affects the spectrum in the frequency domain. This is an important relationship to understand in order to be able to adjust how much frequency spectrum is occupied by a signal

Second Experiment: EFFECT OF FILTERING & NOISE OF THE SPECTRUM

 Objectives

To examine the effects of filtering on waveshape and bandwidth restriction

Practical of Experiment

Effect of Filtering on Waveshape and Spectrum.

 Third Experiment: AMPLITUDE MODULATIONDOUBLE SIDEBAND WITH FULL CARRIER

Objectives

To understand the concept of multiplying two sinusoidal waveforms.

Practical of Experiment

In this practical you will investigate how two sinusoidal signals are multiplied together to produce a modulated signal. The two signals are generated on the workboard.

Fourth Experiment:DEMODULATION WITH AN ENVELOPE DETECTOR AND WITH A PRODUCT DETECTOR

 Objectives

To investigate demodulation of an amplitude modulated signal using an envelope detector and subsequent filtering.

Practical of Experiment

Demodulation is the reverse process to modulation. In this case it takes the modulated signal of a carrier and two sidebands and extracts the modulating signal from it. In this instance this can be done very simply.

Fifth Experiment: FREQUENCY MODULATION USING AN IQ MODULATOR

Objectives

To appreciate that a frequency modulated signal can be produced using an IQ modulator and the advantages of this method.

Practical of Experiment

 Sixth Experiment: DEMODULATION OF FM USING A PHASE LOCKED LOOP

Objectives

In the Practical you will see how the PLL operates as a demodulator

Practical of Experiment

The FM generator that you will use in this Practical is the VCO that you have already used modulated by the function generator. The PLL is made from the local oscillator, which is also a VCO, and multipliers used as a phase detector. A loop filter and a post detection filter complete the demodulator)

Seventh Experiment: Ultrasonic GENERATING SSB WITH AN IQ MODULATOR

Objectives

To appreciate that a single sideband suppressed carrier signal may be produced using phasing, rather than filtering, methods.

Practical of Experiment

1The generation of an SSB signal can be achieved by a number of methods. They fall into two categories: filtering out the unwanted sideband with a bandpass filter, or by using phase to cancel it out

Eighth Experiment: SAMPLING AND TIME DIVISION MULTIPLEXING

Objectives

In this practical you will investigate time division multiplexing using two A/D converters and a single D/A converter.

Practical of Experiment

1Two analogue signals: one a sinusoid and the other a variable dc voltage are fed into the two A/D converters. The microprocessor samples the two alternatively at 20 kHz. The multiplexed signal is passed to a D/A and you can see it on the oscilloscope.

Ninth Experiment: ALIASINGE EFFECTS OF ALIASING

Objectives

In this practical you will investigate the effect of sampling an analogue signal at sample rates near to and below its frequency

Practical of Experiment

Aliasing can be a significant problem in any sampling system and can result in completely misleading results. The lowest rate that can be used to sample a signal is twice the frequency of the signal you are trying to sample. Even then the results may not be satisfactory

first Experiment: 74 Series Logic Families

 Objectives

To get familiar with parts of 74 series logic.

Practical of Experiment

How to use Electronics workbench program .

Second Experiment: Design Of Shifter Unit

 Objectives

Study the design implementation requirements of a basic Combinational shift unit.

Practical of Experiment

Design 4- bit combinational shift unit with four operations, using discrete gates.

 Third Experiment: Parallel Adder / Subtractor

Objectives

To study the design and implementation of binary arithmetic addition and subtraction and binary coded decimal (BCD) .

Practical of Experiment

Design and implement a 4-bit parallel adder.

Fourth Experiment: Serial Binary Addition/ Subtraction

 Objectives

To study the design and implementation of a basic arithmatic addition and subtraction in a serial computer for both signed and unsigned numbers.

Practical of Experiment

1-Design and implement a serial 2's complement circuit.

2- Design and implement a 4-bit serial adder.

Fifth Experiment: µ - Operation Controller Of ALU

Objectives

1- Study the micro-operation of a basic ALU.

2- Design of arithmetic circuit and logic circuit of one stage ALU.

Practical of Experiment

Design one stage arithmetic unit using a full-adder and a simple gates.

 Sixth Experiment: Register Transfer & Bus System Design

Objectives

Study the design methods of data transfer through a comman bus.

Practical of Experiment

Design a bus system to transfer 2-bit information between 2 registers ,each of them can be considered as a source register or a destination register using multiplexer and decoder.

Seventh Experiment: Central Processing Unit Organization

Objectives

To Study design requirements of a basic central processing unit and its operation.

Practical of Experiment

Connect and test ALU (74181).

Eighth Experiment: Hardware Design Of Binary Multiplier

Objectives

Study and implementation of different methods in binary multipliers design.

Practical of Experiment

Implement control logic circuit for binary multiplier to evaluate a binary multiplier system using sequencer register and decoder control.

Ninth Experiment: Microprogram Sequencer For A Control Memory

Objectives

To study and design requirement for the sequencer of a control memory.

Practical of Experiment

Design input logic circuit using a minimum number of gates.

Tenth Experiment: Design Chain Priority Interrupt System

Objectives

Design Chain Priority Interrupt System

Practical of Experiment

Draw and implement a hardware simulation of 3-devices interrupting a (CPU).